3.3V LVDS 1:4 Clock Fanout Buffer

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The AK8181G is a member of AKM’s LVDS clock fanout buffer family designed for telecom, networking and computer applications, requiring a range of clocks with high performance and low skew. The AK8181G distributes 4 buffered clocks.

AK8181G are derived from AKM’s long-term- experienced clock device technology, and enable clock output to perform low skew. The AK8181G is available in a 20-pin TSSOP package.


Key Features

Four differential 3.3V LVDS outputs
Selectable two LVCMOS/LVTTL clock inputs
Clock output frequency up to 650MHz
Translates LVCMOS/LVTTL input signals to LVDS levels
Output skew : 30ps (maximum)
Part-to-part skew : 500ps (maximum)
Propagation delay : 2.2ns (maximum)
Additive phase jitter(RMS): 0.1ps (typical)
Operating Temperature Range: -40 to +85℃
Package: 20-pin TSSOP (Pb free)
Pin compatible with ICS8545I

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Block Diagram

Block Diagram

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